Digital devices which are capable of asynchronous operation are well known in the art. Applications for such devices span a large range of digital signal processing equipment from printer (low speed)-computer (high speed) interfaces to digital data transmission systems where a low speed data stream is mapped into a high speed data transmission signal. An example of the latter is a digital formatter for mapping a digital signal into one having a SONET format.
With known formatters, full data bytes in the digital signal are divided into partial bytes by taking sequential serial data, and dividing it into the appropriately sized bytes to be combined with control bits and stuff bits. The resulting data signal is comprised of 8-bit words plus an extra flag bit to indicate the beginning of a known data sequence. This data signal must be passed through an elastic store. Additional circuits are included on the output or "read" side of the store to detect the flag bit that locates the start of the data formatting sequence. These circuits must also add whatever additional data, stuff bytes and stuff bits that may be required by the synchronous payload. Thus, both sides share the same framing and data alignment information needed to create the correct payload. An example of the foregoing for serial information is found in U.S. Pat. Nos. 4,928,275 entitled "Synchronization of Asynchronous Data Signals". Related apparatus are disclosed in U.S. Pat. No. 5,052,025.
A major shortcoming with the above referenced formatter lies with the fact that two sets of payload tracking circuitry, e.g. formatting counters and circuits, are required on each side of the elastic store. This adds unneeded complexity. The most common method of linking the circuitry on both sides is to send a flag bit through the elastic store with the data. The elastic store then requires an extra bit of width for all handshaking signals to pass through in the correct alignment with the data. Therefore, a 9-bit wide store must be used instead of an 8-bit wide store, resulting in an elastic store wider than it otherwise would have to be.
Another problem with known data formatters is their inability to map the data signal payload in a specific manner (i.e., a specific location in the higher speed signal frame) since the propagation time through the elastic store varies and is therefor unknown. Moreover, a brute force method of alignment would require more time in the form of many extra gates to implement. Consequently, the "write" side of the elastic store will typically originate the data formatting process with known apparatus.
Any digital system where a low speed, continuous data stream is mapped into a higher speed signal will require extra stuff bits and control bits that instruct the receiving device how to extract the payload. SONET compatible equipment has a fixed payload size but varying rates at which asynchronous data can be mapped into the payload. Therefore, the stuff bits and control bits used to fill up the payload must be supplied on both sides of the elastic store. It would be advantageous to have an apparatus that allows sequential data transfer of full data bytes into partial bytes using a one clock signal and a single assembly of control circuitry. The present invention is drawn towards such an apparatus.